# Analog Neural Network Model based on Logarithmic Four-Quadrant Multipliers

### Abstract

Models for artificial intelligence, machine learning, and neural networks are implemented on

digital computers with a von Neumann architecture. Few studies have considered analog neural

networks. In our previous study, we used multipliers for representing connecting weights in a

neural network. The multipliers calculate the product of input signals and their corresponding

connecting weights. However, their operating range is limited by semiconductor characteristics.

The input and output ranges for networks that use these multipliers are thus limited. Furthermore,

the circuit operation becomes unstable. Here, we propose a logarithmic four-quadrant multiplier

for representing connecting weights. Experiments show that this multiplier exhibits stable operation

over a wide range. A model that uses only analog electronic circuits is presented. Its

learning time is quite short compared to that for models implemented on a digital computer. We

increased the number of units and network layers. We suggest the possibility of a hardware implementation

of a deep learning model.

### References

C. Mead, Analog VLSI and Neural Systems, Addison Wesley Publishing Company, Inc.,

C. P. Chong, C. A. T. Salama, K. C. Smith, “Image-Motion Detection Using Analog VLSI, ”

IEEE Journal of Solid-State Circuits vol.27, No.1, 1992, pp. 93-96.

Z. Lu, B. E. Shi, “Subpixel Resolution Binocular Visual Tracking Using Analog VLSI Vision

Sensors, ” IEEE Transactions on Circuits and Systems-II: Analog and Digital Signal Pro- cessing, vol.47, No.12, 2000, pp. 1468-1475.

T. Saito and H. Inamura, “Analysis of a simple A/D converter with a trapping window, ”

IEEE Int. Symp. Circuits Syst., 2003, pp. 1293-1305.

F. Luthon, D. Dragomirescu, “A Cellular Analog Network for MRF-Based Video Motion

Detection, ” IEEE Transactions on Circuits and Systems-I: Fundamental Theory and Appli- cations, vol.46, No.2, 1999, pp. 281-293.

H. Yamada, T. Miyashita, M. Ohtani, H. Yonezu, “An Analog MOS Circuit Inspired by an Inner Retina for Producing Signals of Moving Edges, ” Technical Report of IEICE, NC99-112, 2000, pp. 149-155.

T. Okuda, S. Doki, M. Ishida, “Realization of Back Propagation Learning for Pulsed Neural Networks Based on Delta-Sigma Modulation and Its Hardware Implementation,” ICICE Transactions, J88-D-II-4, 2005, pp 778-788.

M. Kawaguchi, T. Jimbo, and M. Umeno, “Motion Detecting Artificial Retina Model byTwo-Dimensional Multi-Layered Analog Electronic Circuits, ” IEICE Transactions,E86-A-2, 2003, pp. 387-395.

M. Kawaguchi, T. Jimbo, and M. Umeno, “Analog VLSI Layout Design of Advanced ImageProcessing For Artificial Vision Model, ” IEEE International Symposium on IndustrialElectronics, ISIE2005 Proceeding, vol.3, 2005, pp. 1239-1244.

M. Kawaguchi, T. Jimbo, and M. Umeno, “Analog VLSI Layout Design and the CircuitBoard Manufacturing of Advanced Image Processing for Artificial Vision Model, ”KES2008, Part II, LNAI, vol. 5178, 2008, pp. 895-902

M. Kawaguchi, T. Jimbo, and M. Umeno, “Dynamic Learning of Neural Network by An-alog Electronic Circuits, ” Intelligent System Symposium, FAN2010, 2010, S3-4-3.

M. Kawaguchi, T. Jimbo, and N. Ishii, “Analog Learning Neural Network using Multipleand Sample Hold Circuits,” IIAI/ACIS International Symposiums on Innovative E-Serviceand Information Systems, IEIS 2012, 2012, pp243-246.

Yoshua Bengio, Aaron C. Courville, Pascal Vincent: Representation Learning, “A Reviewand New Perspectives, ” IEEE Trans. Pattern Anal. Mach. Intell. 35(8), 2013, 1798-1828.

M. Kawaguchi, N. Ishii, and M. Umeno, Analog Hardware Neural Networks using Loga-rithmic Four-Quadrant Multiple Circuits, 9th International Conference on Smart Computingand Artificial Intelligence, SCAI 2021, 446-451, 2021

M. Kawaguchi, N. Ishii, and M. Umeno, “Analog neural circuit with switched capacitor anddesign of deep learning model, ” 3rd International Conference on Applied Computing andInformation Technology and 2nd International Conference on Computational Science andIntelligence, ACIT-CSI, 2015, pp322-327

M. Kawaguchi, N. Ishii, and M. Umeno, Analog Neural Network Model based on ImprovedLogarithmic Multipliers, 10th International Conference on Smart Computing and ArtificialIntelligence, SCAI 2022, 378-383, 2022

M. Kawaguchi, N. Ishii, and M. Umeno, “Analog Learning Neural Circuit with SwitchedCapacitor and the Design of Deep Learning Model,” Computational Science/Intelligence andApplied Informatics, Studies in Computational Intelligence, 726, 2017, pp93-107.

M. Kawaguchi, N. Ishii, and M. Umeno, “Analog Neural Circuit by AC Operation and theDesign of Deep Learning Model,” DEStech Transactions on Computer Science and Engi-neering, 3rd International Conference on Artificial Intelligence and Industrial Engineering,2017, pp228-233.

M. Kawaguchi, N. Ishii, and M. Umeno, “Analog Learning Neural Circuit with SwitchedCapacitor and the Design of Deep Learning Model,” COMPUTATIONAL SCI-ENCE/INTELLIGENCE AND APPLIED INFORMATICS, 726, 2018, 93-107.

M. Kawaguchi, N. Ishii, and M. Umeno, “Learning Neural Circuit by AC Operation andFrequency Signal Output,” Computer and Information Science, ICIS2019, best paper, 849,2020, 15-30.

M. Kawaguchi, N. Ishii, and M. Umeno, “AC Operation Hardware Learning Neural Circuit Using V-F Converter System,” Sensor Networks and Signal Processing, Springer, 176, 2020, 297-310.